New release: https://github.com/DTL2020/AviSynth-vsTTempSmooth/releases/tag/1.3.0_a.04
Finished full-SIMD AVX2 processing (about 30x faster of C-scalar with maxr > 20).
maxr in pmode=1 may be up to 128 (same as in MDegrainN/mvtools2).
It is finally ready for PR to Asd-g. But it was found in current Asd-g sources also some non-compatibility with x86 32bit building. So still no 32bit build. Waiting for reply from Asd-g about 32bit building.
Tests shows the IIR mode still produce worse MPEG bitrate and may be more artifacts. At least with natrual content. May be better with flat colours anime. Also any non-motion compensated processing looks like quickly make lots of artifatcs even with ythresh close to 'noise level'. So expected to use mostly in motion-compensated scripts (MCTD.avsi ?) . I again was too lazy to collect all plugins required to run MCTD and made simple mvtools-only based MC script (up to tr=12). Also it was found the DX12-ME mode of MAnalyse may have some limitaiton on number of MAnalyse in the script (at least with GTX1060 card and its drivers) so the multi-mode and extracting MVs for each MCompensate is very useful in such cases. It allow to run 1 (or 2 for interlaced) MAnalyse with DX12 objects and use any tr required.
For interlaced footage:
# Input plugins
LoadPlugin("ffms2.dll")
LoadPlugin("mvtools2.dll")
LoadPlugin("vsTTempSmooth.dll")
SetFilterMTMode("DEFAULT_MT_MODE", 3)
FFmpegSource2("mv.mpg", fpsnum=25)
SeparateFields()
fields_orig=last
odd_f=SelectOdd()
even_f=SelectEven()
super_o = MSuper(odd_f, chroma=true)
super_e = MSuper(even_f, chroma=true)
tr=12
/*
# better MVs MAnalyse + full real 4x overlap, about 5x slower
mv_m_o=MAnalyse(super_o, multi=true, delta=tr, search=3, trymany=true, global=true, pzero=10, pnew=10, pglobal=10, overlap=4, chroma=true)
mv_m_e=MAnalyse(super_e, multi=true, delta=tr, search=3, trymany=true, global=true, pzero=10, pnew=10, pglobal=10, overlap=4, chroma=true)
*/
#Simple MAnalyse
mv_m_o=MAnalyse(super_o, multi=true, delta=tr)
mv_m_e=MAnalyse(super_e, multi=true, delta=tr)
/*
#DX12 HW ME
mv_m_o=MAnalyse(super_o, multi=true, delta=tr, optSearchOption=6, levels=1)
mv_m_e=MAnalyse(super_e, multi=true, delta=tr, optSearchOption=6, levels=1)
*/
bv1_o = SelectEvery(mv_m_o, tr*2, 0)
bv1_e = SelectEvery(mv_m_e, tr*2, 0)
bv2_o = SelectEvery(mv_m_o, tr*2, 2)
bv2_e = SelectEvery(mv_m_e, tr*2, 2)
bv3_o = SelectEvery(mv_m_o, tr*2, 4)
bv3_e = SelectEvery(mv_m_e, tr*2, 4)
bv4_o = SelectEvery(mv_m_o, tr*2, 6)
bv4_e = SelectEvery(mv_m_e, tr*2, 6)
bv5_o = SelectEvery(mv_m_o, tr*2, 8)
bv5_e = SelectEvery(mv_m_o, tr*2, 8)
bv6_o = SelectEvery(mv_m_o, tr*2, 10)
bv6_e = SelectEvery(mv_m_o, tr*2, 10)
bv7_o = SelectEvery(mv_m_o, tr*2, 12)
bv7_e = SelectEvery(mv_m_o, tr*2, 12)
bv8_o = SelectEvery(mv_m_o, tr*2, 14)
bv8_e = SelectEvery(mv_m_o, tr*2, 14)
bv9_o = SelectEvery(mv_m_o, tr*2, 16)
bv9_e = SelectEvery(mv_m_o, tr*2, 16)
bv10_o = SelectEvery(mv_m_o, tr*2, 18)
bv10_e = SelectEvery(mv_m_o, tr*2, 18)
bv11_o = SelectEvery(mv_m_o, tr*2, 20)
bv11_e = SelectEvery(mv_m_o, tr*2, 20)
bv12_o = SelectEvery(mv_m_o, tr*2, 22)
bv12_e = SelectEvery(mv_m_o, tr*2, 22)
fv1_o = SelectEvery(mv_m_o, tr*2, 1)
fv1_e = SelectEvery(mv_m_e, tr*2, 1)
fv2_o = SelectEvery(mv_m_o, tr*2, 3)
fv2_e = SelectEvery(mv_m_e, tr*2, 3)
fv3_o = SelectEvery(mv_m_o, tr*2, 5)
fv3_e = SelectEvery(mv_m_e, tr*2, 5)
fv4_o = SelectEvery(mv_m_o, tr*2, 7)
fv4_e = SelectEvery(mv_m_e, tr*2, 7)
fv5_o = SelectEvery(mv_m_o, tr*2, 9)
fv5_e = SelectEvery(mv_m_e, tr*2, 9)
fv6_o = SelectEvery(mv_m_o, tr*2, 11)
fv6_e = SelectEvery(mv_m_e, tr*2, 11)
fv7_o = SelectEvery(mv_m_o, tr*2, 13)
fv7_e = SelectEvery(mv_m_e, tr*2, 13)
fv8_o = SelectEvery(mv_m_o, tr*2, 15)
fv8_e = SelectEvery(mv_m_e, tr*2, 15)
fv9_o = SelectEvery(mv_m_o, tr*2, 17)
fv9_e = SelectEvery(mv_m_e, tr*2, 17)
fv10_o = SelectEvery(mv_m_o, tr*2, 19)
fv10_e = SelectEvery(mv_m_e, tr*2, 19)
fv11_o = SelectEvery(mv_m_o, tr*2, 21)
fv11_e = SelectEvery(mv_m_e, tr*2, 21)
fv12_o = SelectEvery(mv_m_o, tr*2, 23)
fv12_e = SelectEvery(mv_m_e, tr*2, 23)
fwc1_o = MCompensate(super_o, fv1_o)
fwc1_e = MCompensate(super_e, fv1_e)
fwc2_o = MCompensate(super_o, fv2_o)
fwc2_e = MCompensate(super_e, fv2_e)
fwc3_o = MCompensate(super_o, fv3_o)
fwc3_e = MCompensate(super_e, fv3_e)
fwc4_o = MCompensate(super_o, fv4_o)
fwc4_e = MCompensate(super_e, fv4_e)
fwc5_o = MCompensate(super_o, fv5_o)
fwc5_e = MCompensate(super_e, fv5_e)
fwc6_o = MCompensate(super_o, fv6_o)
fwc6_e = MCompensate(super_e, fv6_e)
fwc7_o = MCompensate(super_o, fv7_o)
fwc7_e = MCompensate(super_e, fv7_e)
fwc8_o = MCompensate(super_o, fv8_o)
fwc8_e = MCompensate(super_e, fv8_e)
fwc9_o = MCompensate(super_o, fv9_o)
fwc9_e = MCompensate(super_e, fv9_e)
fwc10_o = MCompensate(super_o, fv10_o)
fwc10_e = MCompensate(super_e, fv10_e)
fwc11_o = MCompensate(super_o, fv11_o)
fwc11_e = MCompensate(super_e, fv11_e)
fwc12_o = MCompensate(super_o, fv12_o)
fwc12_e = MCompensate(super_e, fv12_e)
bwc1_o = MCompensate(super_o, bv1_o)
bwc1_e = MCompensate(super_e, bv1_e)
bwc2_o = MCompensate(super_o, bv2_o)
bwc2_e = MCompensate(super_e, bv2_e)
bwc3_o = MCompensate(super_o, bv3_o)
bwc3_e = MCompensate(super_e, bv3_e)
bwc4_o = MCompensate(super_o, bv4_o)
bwc4_e = MCompensate(super_e, bv4_e)
bwc5_o = MCompensate(super_o, bv5_o)
bwc5_e = MCompensate(super_e, bv5_e)
bwc6_o = MCompensate(super_o, bv6_o)
bwc6_e = MCompensate(super_e, bv6_e)
bwc7_o = MCompensate(super_o, bv7_o)
bwc7_e = MCompensate(super_e, bv7_e)
bwc8_o = MCompensate(super_o, bv8_o)
bwc8_e = MCompensate(super_e, bv8_e)
bwc9_o = MCompensate(super_o, bv9_o)
bwc9_e = MCompensate(super_e, bv9_e)
bwc10_o = MCompensate(super_o, bv10_o)
bwc10_e = MCompensate(super_e, bv10_e)
bwc11_o = MCompensate(super_o, bv11_o)
bwc11_e = MCompensate(super_e, bv11_e)
bwc12_o = MCompensate(super_o, bv12_o)
bwc12_e = MCompensate(super_e, bv12_e)
# create interleaved frames sequences
int_o = interleave(fwc12_o, fwc11_o, fwc10_o, fwc9_o, fwc8_o, fwc7_o, fwc6_o, fwc5_o, fwc4_o, fwc3_o, fwc2_o, fwc1_o, odd_f, bwc1_o, bwc2_o, bwc3_o, bwc4_o, bwc5_o, bwc6_o, bwc7_o, bwc8_o, bwc9_o, bwc10_o, bwc11_o, bwc12_o)
int_e = interleave(fwc12_e, fwc11_e, fwc10_e, fwc9_e, fwc8_e, fwc7_e, fwc6_e, fwc5_e, fwc4_e, fwc3_e, fwc2_e, fwc1_e, even_f, bwc1_e, bwc2_e, bwc3_e, bwc4_e, bwc5_e, bwc6_e, bwc7_e, bwc8_e, bwc9_e, bwc10_e, bwc11_e, bwc12_e)
my_Yth=10
my_thupd=0
my_pnew=2
my_opt=2
my_tr=tr
int_o=vsTTempSmooth(int_o, pmode=1, Ythresh=my_Yth, opt=my_opt, ythupd=my_thupd, uthupd=my_thupd, vthupd=my_thupd, ypnew=my_pnew, upnew=my_pnew, vpnew=my_pnew, maxr=my_tr)
int_e=vsTTempSmooth(int_e, pmode=1, Ythresh=my_Yth, opt=my_opt, ythupd=my_thupd, uthupd=my_thupd, vthupd=my_thupd, ypnew=my_pnew, upnew=my_pnew, vpnew=my_pnew, maxr=my_tr)
odd_f=selectevery(int_o, tr*2+1, tr) # return filtered central (not-compensated) frames only
even_f=selectevery(int_e, tr*2+1, tr) # return filtered central (not-compensated) frames only
Interleave(odd_f, even_f)
Weave()
Prefetch(..)
The 'best' MAnalyse run about 5x slower but produce best quality (and lowest MPEG file size at fixed crf). Also for even better MVs quality (and details saving) the multu-generation MAnalyse+MDegrainN can be used. The DX12-ME at GTX1060 produce slightly larger MPEG file (same as with MDegrainN). Using motion-compensated sources allow to use Ythresh about 2x larger of 'noise level' and still have low enough artifacts.
The 'denoise power' mostly depends on tr (with enough Ythresh) and comparable to MDegrainN. The performance mostly limited by MPEG encoder (x264) at my CPU. To save from lots of scripting with bir tr-values (and also to use already working interpolated overlap) it is expected to addition to MDegrainN as separate or combined processing mode. Quality is about good at low motion areas and mostly static. At fast moving areas it looks at least some overlap is required to make quality better (slower with old MAnalyse+MCompensate - need at least interpolating overlap addition to MCompensate too). Or may be some motion-masking (as in MCTD ?).
Update: Asd-g wrote it is no more possible to do 32bit builds of this plugin because of the limitaiton of the VCL used for SIMD functions. Also looks all other plugins by Asd-g with same VCL-based SIMD functions will no more have 32bit builds.
vBulletin® v3.8.11, Copyright ©2000-2026, vBulletin Solutions Inc.