Warehouse-Scale Video Acceleration: Co-design and Deployment in the Wild

[ksec]

For those that might be interested in Hardware, Industrial Scale Encoding.

The simple version reporting from Ars is here

https://arstechnica.com/gadgets/2021/04/youtube-is-now-building-its-own-video-transcoding-chips/

Or the paper which goes into much more juicy detail

https://dl.acm.org/doi/abs/10.1145/3445814.3446723

[Asmodian]

I wonder if they will show up on eBay one day. It sounds like really cool hardware. Using it would be way over my head, unless the software was available as well (seems unlikely). Software-Hardware codesign is a great concept, I think we will see this for a lot more workloads in the future. It will be an important step to get significantly more performance per power for specific compute tasks without Moore's Law.

Calow told the YouTube blog, "One of the things about this is that it wasn't a one-off program. It was always intended to have multiple generations of the chip with tuning of the systems in between. And one of the key things that we're doing in the next-generation chip is adding in AV1, a new advanced coding standard that compresses more efficiently than VP9 and has an even higher computation load to encode."

Right now it might take entities like Google or Amazon to be able to afford Hardware-Software projects like this.

[benwaggoner]

It's an interesting approach to the high-volume low-watt use case for user-generated content. The general rule of ASIC encoders is that they can provide decent quality at high bitrates very quickly, but they hit a quality ceiling pretty quickly where software encoders can keep on trading off slower encoding for improved quality. For YouTube, where encoding was tuned for easy segmenting over quality or bitrate, ASIC could be a great fit compared to just using idle Google servers.

The SW/ASIC gap grows with codec complexity. The gap was smaller with MPEG-2, bigger with H.264, and even bigger with HEVC and AV1 (which this generation ASIC don't support). This is due to how branchy mode decisions are in modern codecs, where doing everything with a lot of cores working in L3 cache offers great latency. And AVX2 is powerful SIMD for DSP operations. That kind of DSP stuff was what made ASICs so good historically, but CPUs have become MUCH more performant since the MMX era.

Looking at the graphs in the paper, the ASIC H.264 has a markedly worse bit rate distortion curve, even when using PSNR which x264 doesn't tune for. Oddly, the libvpx comparison doesn't plot higher bitrates for ASIC, so it's a little harder to parse, but libvpx still shows some advantage. Although without any settings documented, it's hard to know what's really being compared.