Ryzens Deep Learning branch Prediction

[CruNcher]

http://www.ginjfo.com/wp-content/uploads/2016/12/Ryzen_05a.jpg


How is this going to work out especially on semi optimal ASM code ?


AMD employs a neural network in its branch prediction subsystem. It builds a model of the code being executed so that its Smart Prefetch can pre-load instructions and optimize the path through the processor pipeline. The neural network is designed to learn from the currently running applications rather than the predefined static analysis often used in other deep learning applications.

Would you think it will boost up semi optimized applications significantly giving it a certain learning time to optimize the prediction ?

And what will it do to from the Human perspective side optimal Code ?

Will Human coders start to fight against a AI, that finds their code bad optimized after some time and redo it without actually the coder even knowing what happens ;)

Is this really the first approach to Self Learning and Self Writing optimizing architectures (Machines) ?


Also where is this Progress of the Deep Leanring algorithm saved if it's really Dynamically Learning where is it's brain physical space (Learned Models) ?

Ryzens Deep Learning Branch Prediction = https://youtu.be/QXTA5WuhCD4?t=32 ?

[LoRd_MuldeR]

Preface: Branch prediction is absolutely nothing new. Every processor with a (long) pipeline needs branch prediction, because you need to put "future" instructions into the pipeline already before your know (for sure) how branches are going to turn out. Any "misprediction" is really bad, as it requires to flush the pipeline and start all over from the point of the "missed" branch, i.e. mispredictions costs performance. This all is not new and has been done for decades now.

So, what is "new" is how exactly they have implemented their branch prediction subsystem. Or, more specifically, what buzzword they use to describe their particular implementation. It seems everything needs to use a "neural net" these days ;)

The only thing that matters about the branch prediction subsystem is the "accuracy" that it can achieve - in real world applications. So, it will be interesting to see how much better (if any) the Ryzen's branch prediction will perform in real world applications, compared to previous processor generations. But, since the branch predictors of modern processors have been pretty close to the maximum (accuracy clearly above 90%) for a long time already, I wouldn't expect "wonders" here.

BTW: I would assume that for highly optimized Assembly code the branch predictor plays a subordinate role. That's because optimized Assembly code tries to avoid branches as far as anyhow possible. No branches → nothing to be predicted.

[CruNcher]

Yeah in some Websites text it sounds like a Self Learning thing which can expand the Model itself further but in the actual marketing slides it sounds like a Neural Network trained algorithm with a stuck Model it uses from a Trained Dataset of Applications (typical execution situations) it was optimized (trained) beforehand on and the Model sits permanently saved somewhere without able to expand and train itself further (learn on the fly uncontrolled).
But surely they used their Radeon GPU and a big cluster of them to train it and reaching a very high Prediction accuracy @ Runtime now :)

But it makes you wonder if they could actually exchange the Brain if necesary or update it via a Bios or Microcode update :)

[nevcairiel]

I would think they derived their branch prediction using machine learning, feeding it uncountable real-world applications and learning patterns that way, optimizing the algorithm during development - not that the chip itself is actually learning, hardware can't exactly do that.
Similar to how something like NNEDI3 works, it was once trained on a variety of images and out came a fixed neural network to make decisions. While such a neural network is smart and can adapt to the input given, it can't learn anything new, so the performance is still fully deterministic and running your CPU for longer won't make it "smarter" :)

[CruNcher]

Yep Pre Trained not Training itself on the Fly with new Data expanding it's Network on its own like some Websites seem to think of this but still nice if you think about costs and how you can simply exchange things in Hardware and improve it now with a simple Software update.

So everything in a very controlled environment.

So we really see how AMD and Nvidia start to use more and more Machine Learning to improve their own Hardware which is then used to train more and better and more not sure if intel does the same so much (they never at least explicitly said so in Public like AMD does now).

Which is in some way a Form of a Machine optimizing another Machine faster then a Human alone could do ;)

[raffriff42]

https://en.wikipedia.org/wiki/Branch_predictor#Neural_branch_prediction

The main disadvantage of the perceptron predictor is its high latency. Even after taking advantage of high-speed arithmetic tricks, the computation latency is relatively high compared to the clock period of many modern microarchitectures.It might be a problem if the branch prediction has pipeline issues of its own...

[CruNcher]

ok that answers my question about Intel, they just seem never so offensively marketed it and keeped it rather low profile :D

Most of the state-of-the-art branch predictors are using a perceptron predictor (see Intel's "Championship Branch Prediction Competition" [19]). Intel already implements this idea in one of the IA-64's simulators (2003).[citation needed]

The AMD Ryzen processor, previewed on December, 13th, 2016, revealed its newest processor architecture using a neural network based branch predictor to minimize prediction errors.[20][21]