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24th September 2012, 03:21
Nvidia Corp. is reportedly working on an ultra high-performance system-on-chip based on ARM architecture, which would challenge AMD Opteron and Intel Xeon microprocessors in the server space. The chip is called project Boulder and it is designed by Nvidia's graphics processing unit team.
It is not a secret that Nvidia is already working on project Denver, an Nvidia high-performance central processing unit (CPU) running the ARM instruction set, which will be fully integrated on the same chip as an Nvidia graphics processing unit (GPU). The first implementation of project Denver is code-named Maxwell graphics processor.
Denver and Maxwell fit perfectly into Nvidia's Echelon extreme-scale computing project. The Echelon design incorporates a large number (~1024) of stream cores and a smaller (~8) number of latency-optimized CPU-like cores on a single chip, sharing a common memory system. In case of Echelon described in 2010, eight stream processors (SPs) would form a streaming multiprocessor (SM) and 128 of SMs would form a large pool of throughput-optimized processing elements (hence, it does not employ Kepler paradigm of many SPs per SM). Echelon is expected to become reality only in 2018 - 2020 timeframe.
http://www.xbitlabs.com/news/cpu/display/20120921010327_Nvidia_Develops_High_Performance_ARM_Based_Boulder_Microprocessor_Report.html
It is not a secret that Nvidia is already working on project Denver, an Nvidia high-performance central processing unit (CPU) running the ARM instruction set, which will be fully integrated on the same chip as an Nvidia graphics processing unit (GPU). The first implementation of project Denver is code-named Maxwell graphics processor.
Denver and Maxwell fit perfectly into Nvidia's Echelon extreme-scale computing project. The Echelon design incorporates a large number (~1024) of stream cores and a smaller (~8) number of latency-optimized CPU-like cores on a single chip, sharing a common memory system. In case of Echelon described in 2010, eight stream processors (SPs) would form a streaming multiprocessor (SM) and 128 of SMs would form a large pool of throughput-optimized processing elements (hence, it does not employ Kepler paradigm of many SPs per SM). Echelon is expected to become reality only in 2018 - 2020 timeframe.
http://www.xbitlabs.com/news/cpu/display/20120921010327_Nvidia_Develops_High_Performance_ARM_Based_Boulder_Microprocessor_Report.html